NVIDIA PTX Memory Model
A scoped, relaxed model for NVIDIA's PTX virtual ISA, with relaxed/acquire/release atomics and explicit thread scopes (CTA, GPU, system). Synchronisation only takes effect between threads that share the named scope, so narrower scopes admit weak behaviours a flat model forbids. Formalised and machine-checked by Lustig et al. (ASPLOS 2019) and the foundation for CUDA's cuda::atomic semantics.
Ordering relationships
- Compilation target of
- CUDA C++ Memory Model — CUDA C++ atomics lower to PTX; the CUDA model is layered directly on the PTX memory model.
- OpenCL 2.0 Memory Model — OpenCL kernels compile to PTX on NVIDIA GPUs.
- Vulkan Memory Model — Vulkan/SPIR-V compute shaders compile to PTX on NVIDIA GPUs.
- Incomparable with
- AMD GPU Memory Model — Both are scoped release-consistency ISA models, but expose different scope sets (CTA/GPU/system vs HSA work-group/agent/system) and cache-control qualifiers; neither subsumes the other.
References
- Daniel Lustig, Sameer Sahasrabuddhe, Olivier Giroux. A Formal Analysis of the NVIDIA PTX Memory Consistency Model. ASPLOS 2019, 2019. doi:10.1145/3297858.3304043
- Jade Alglave, Mark Batty, Alastair F. Donaldson, Ganesh Gopalakrishnan, Jeroen Ketema, Daniel Poetzl, Tyler Sorensen, John Wickerson. GPU Concurrency: Weak Behaviours and Programming Assumptions. ASPLOS 2015, 2015. doi:10.1145/2694344.2694391