Relaxed Memory Model Zoo

Memory model
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x86-TSO

2010 · Sewell, Sarkar, Owens, Zappa Nardelli, Myreen · hardware, formal

A rigorous formal model for x86 multiprocessor memory, validated against AMD and Intel hardware. Captures FIFO store buffers, lock prefixes, and MFENCE barriers precisely.

Ordering relationships

Strictly weaker than
Equivalent to
Compilation target of

References

  • Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, Magnus O. Myreen. x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors. Communications of the ACM, 2010. doi:10.1145/1785414.1785443